mt47h128m16hg-3-it Micron Semiconductor Products, mt47h128m16hg-3-it Datasheet - Page 45

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mt47h128m16hg-3-it

Manufacturer Part Number
mt47h128m16hg-3-it
Description
2gb X4, X8, X16 Ddr2 Sdram
Manufacturer
Micron Semiconductor Products
Datasheet
Figure 28:
PDF: 09005aef824f87b6/Source: 09005aef824f1182
2gb_ddr2.fm - Rev. A 9/06 EN
COMMAND 5
BA0, BA1, BA2
DQS, DQS#
DQS, DQS#
ADDRESS
Case 1: t AC (MIN) and t DQSCK (MIN)
Case 2: t AC (MAX) and t DQSCK (MAX)
DQ 1
DQ 1
CK#
CKE
A10
DM
CK
NOP 5
Bank Read – with Auto Precharge
T0
Notes:
Bank x
ACT
RA
T1
RA
1. DO n = data-out from column n; subsequent elements are applied in the programmed
2. BL = 4, RL = 4 (AL = 1, CL = 3) in the case shown.
3. Enable auto precharge.
4. ACT = ACTIVE, RA = row address, BA = bank address.
5. NOP commands are shown for ease of illustration; other commands may be valid at these
6. The DDR2 SDRAM internally delays auto precharge until both
7. I/O balls, when entering or exiting HIGH-Z, are not referenced to a specific voltage level,
t CK
order.
times.
have been satisfied.
but to when the device begins to drive or no longer drives, respectively.
t RCD
t RAS
t RC
NOP 5
T2
t CH
t CL
READ 2,6
Bank x
Col n
3
T3
AL = 1
prefetch
4-bit
NOP 5
T4
45
t RTP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP 5
T5
t LZ (MIN)
t LZ (MAX)
CL = 3
2Gb: x4, x8, x16 DDR2 SDRAM
Internal
precharge
7
NOP 5
T6
7
t RPRE
t LZ (MIN)
t LZ (MAX)
t RPRE
DON’T CARE
NOP 5
T7
t
RAS (MIN) and
t DQSCK (MIN)
©2006 Micron Technology, Inc. All rights reserved.
t RP
DO
t DQSCK (MAX)
t AC (MIN)
n
t AC (MAX)
DO
n
T7n
READ Command
NOP 5
T8
TRANSITIONING DATA
t HZ (MIN)
t HZ (MAX)
t
T8n
RTP (MIN)
t RPST
t RPST
Bank x
ACT
RA
7
RA
7

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