mt47h128m16hg-3-it Micron Semiconductor Products, mt47h128m16hg-3-it Datasheet - Page 65

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mt47h128m16hg-3-it

Manufacturer Part Number
mt47h128m16hg-3-it
Description
2gb X4, X8, X16 Ddr2 Sdram
Manufacturer
Micron Semiconductor Products
Datasheet
Figure 47:
PDF: 09005aef824f87b6/Source: 09005aef824f1182
2gb_ddr2.fm - Rev. A 9/06 EN
COMMAND
DQS, DQS#
ADDRESS
CK#
CKE
DM
DQ
CK
Power-Down
VALID 1
VALID
T1
Notes:
t CK
power-down
1. If this command is a PRECHARGE (or if the device is already in the idle state), then the
2. No column accesses are allowed to be in progress at the time power-down is entered. If the
3.
4.
5.
6.
mode 2
Enter
NOP
T2
power-down mode shown is precharge power-down. If this command is an ACTIVE (or if at
least one row is already active), then the power-down mode shown is active power-down.
DLL was not in a locked state when CKE went LOW, the DLL must be reset after exiting
power-down mode for proper READ operation.
t
edges. CKE must remain at the valid input level the entire time it takes to achieve the three
clocks of registration. Thus, after any CKE transition, CKE may not transition from its valid
level during the time period of
t
t
command.
t
via MR (bit 12 = 0).
t
via MR (bit 12 = 1).
CKE (MIN) of three clocks means CKE must be registered on three consecutive positive clock
IH window.
XP timing is used for exit precharge power-down and active power-down to any non-READ
XARD timing is used for exit active power-down to READ command if fast exit is selected
XARDS timing is used for exit active power-down to READ command if slow exit is selected
t CH
t CL
T3
t CKE (MIN) 3
T4
t IH
65
t
IS + 2 x
power-down
t IS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
mode
NOP
CK +
Exit
T5
t
IH. CKE must not transition during its
2Gb: x4, x8, x16 DDR2 SDRAM
t XP 4 , t XARD 5
t XARDS 6
NOP
T6
©2006 Micron Technology, Inc. All rights reserved.
t CKE (MIN) 3
Power-Down Mode
VALID
VALID
T7
t IH
DON’T CARE
VALID
VALID
T8
t
IS and

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