mt47h128m16hg-3-it Micron Semiconductor Products, mt47h128m16hg-3-it Datasheet - Page 86

• Manufacturer Part Number: mt47h128m16hg-3-it
• Description: 2gb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Table 25:
Figure 68:
PDF: 09005aef824f87b6/Source: 09005aef824f1182
2gb_ddr2.fm - Rev. A 9/06 EN
Parameter
DC input signal voltage
DC differential input voltage
AC differential input voltage
AC differential cross-point voltage
Input midpoint voltage
Differential Input Logic Levels
All voltages referenced to V
Differential Input Signal Levels
Notes:
Notes:
1. V
2. V
3. V
4. The typical value of V
5. V
@ V
1. This provides a minimum of 850mV to a maximum of 950mV and is expected to be V
2. TR and CP must cross in this region.
3. TR and CP must meet at least V
4. TR and CP must have a minimum 500mV peak-to-peak swing.
5. TR and CP may not be more positive than V
6. For AC operation, all DC clock requirements must also be satisfied.
7. Numbers in diagram reflect nominal values (V
8. TR represents the CK, DQS, RDQS, LDQS, and UDQS signals; CP represents CK#, DQS#,
DD
CK#, DQS, DQS#, LDQS, LDQS#, UDQS, UDQS#, and RDQS, RDQS#.
is the true input (such as CK, DQS, LDQS, UDQS) level and V
(such as CK#, DQS#, LDQS#, UDQS#). The minimum value is equal to V
ential input signal levels are shown in Figure 68.
is the true input (such as CK, DQS, LDQS, UDQS, RDQS) level and V
input (such as CK#, DQS#, LDQS#, UDQS#, RDQS#). The minimum value is equal to V
V
and V
differential input signals must cross, as shown in Figure 68.
the true input (CK, DQS) level and V
expected to be approximately 0.5 x V
RDQS#, LDQS#, and UDQS# signals.
Q = 1.8V
IN
ID
ID
IL
MP
- 0.30V
1.075V
0.725 V
0.9V
(
(
(
(
2.1V
AC
DC
DC
AC
(
CP
TR
DC
), as shown in Table 24 on page 85.
8
IX
8
) specifies the allowable DC execution of each input of differential pair such as CK,
) specifies the input differential voltage | V
) specifies the input differential voltage | V
) specifies the input differential common mode voltage (V
(
AC
SS
) is expected to track variations in V
Input Electrical Characteristics and Operating Conditions
X
Symbol
Vmp(dc)
V
V
V
V
IN
ID
ID
IX
(
(
(
(
DC
DC
AC
AC
)
)
)
)
IX
(
AC
) is expected to be about 0.5 x V
0.50 × V
86
ID
(
DC
–300
Min
250
500
850
DD
) MIN when static and is centered around V
CP
DD
Q - 175
is the complementary input (CK#, DQS#). V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Q.
DD
X
Q + 0.3V or more negative than V
DD
DD
2Gb: x4, x8, x16 DDR2 SDRAM
Q = 1.8V).
TR
TR
0.50 × V
Q. V
- V
- V
V
V
V
IX
DD
DD
DD
CP
CP
(
AC
Max
Q + 300
Q + 600
Q + 600
950
| required for switching, where V
| required for switching, where V
DD
) indicates the voltage at which
DD
Q + 175
CP
Q of the transmitting device
is the complementary input
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TR
CP
V
V
V
+ V
MP(DC)
IN(DC)
IN(DC)
is the complementary
IH
CP
Units
(
1
DC
MAX 5
MIN
mV
mV
mV
mV
mV
)/2 where V
V
) - V
IX(AC)
5
2
IL
MP
SS
(
V
DC
ID(DC)
MP
(DC).
- 0.3V.
Notes
). Differ-
IH
(
V
3
TR
DD
DC
ID(AC)
1
2
3
4
5
(
AC
is
) is
Q/2.
4
) -
TR
TR