mt47h128m16hg-3-it Micron Semiconductor Products, mt47h128m16hg-3-it Datasheet - Page 55

• Manufacturer Part Number: mt47h128m16hg-3-it
• Description: 2gb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Figure 39:
PDF: 09005aef824f87b6/Source: 09005aef824f1182
2gb_ddr2.fm - Rev. A 9/06 EN
COMMAND
ADDRESS
t DQSS (NOM)
t DQSS (MIN)
t DQSS (MAX)
DQS#
DQS#
DQS#
DQS
DQS
DQS
CK#
DM
DM
DM
DQ
DQ
DQ
CK
WRITE-to-PRECHARGE
Bank a,
WRITE
Col b
T0
Notes:
WL - t DQSS
WL + t DQSS
WL + t DQSS
1. DI b = data-in for column b.
2. Three subsequent elements of data-in are applied in the programmed order following DI b.
3. BL = 4, CL = 3, AL = 0; thus, WL = 2.
4.
5. The PRECHARGE and WRITE commands are to the same bank. However, the PRECHARGE
6. A10 is LOW with the WRITE command (auto precharge is disabled).
7. PRE = PRECHARGE command.
8. Subsequent rising DQS signals must align to the clock within
NOP
T1
t
and WRITE commands may be to different banks, in which case
PRECHARGE command could be applied earlier.
WR is referenced from the first positive CK edge after the last data-in pair.
DI
b
NOP
T2
DI
b
DI
b
T2n
8
NOP
T3
8
55
8
T3n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
T4
DON’T CARE
2Gb: x4, x8, x16 DDR2 SDRAM
T5
NOP
TRANSITIONING DATA
t
DQSS.
t WR
t
©2006 Micron Technology, Inc. All rights reserved.
WR is not required and the
T6
NOP
WRITE Command
(a or all)
PRE 7
Bank,
T7
t RP