mt47h128m16hg-3-it Micron Semiconductor Products, mt47h128m16hg-3-it Datasheet - Page 51

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mt47h128m16hg-3-it

Manufacturer Part Number
mt47h128m16hg-3-it
Description
2gb X4, X8, X16 Ddr2 Sdram
Manufacturer
Micron Semiconductor Products
Datasheet
Figure 33:
PDF: 09005aef824f87b6/Source: 09005aef824f1182
2gb_ddr2.fm - Rev. A 9/06 EN
WRITE Burst
Notes:
1. DI b = data-in for column b.
2. Three subsequent elements of data-in are applied in the programmed order following
3. Shown with BL = 4, AL = 0, CL = 3; thus, WL = 2.
4. A10 is LOW with the WRITE command (auto precharge is disabled).
5. Subsequent rising DQS signals must align to the clock within
COMMAND
DQS, DQS#
DQS, DQS#
DQS, DQS#
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
ADDRESS
DI b.
CK#
DM
DM
DM
DQ
DQ
DQ
CK
Bank a,
WRITE
Col b
T0
WL + t DQSS
WL ± t DQSS
WL - t DQSS
51
NOP
T1
DON’T CARE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DI
b
NOP
T2
DI
b
DI
b
2Gb: x4, x8, x16 DDR2 SDRAM
T2n
TRANSITIONING DATA
t DQSS
T3
NOP
5
t DQSS
5
t
DQSS.
5
©2006 Micron Technology, Inc. All rights reserved.
T3n
WRITE Command
NOP
T4

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