gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 138
gc80c520a
Manufacturer Part Number
gc80c520a
Description
Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
1.GC80C520A.pdf
(187 pages)
- Current page: 138 of 187
- Download datasheet (2Mb)
NOP
Description:
Operation:
Encoding:
Function:
Example:
Cycles:
Bytes:
No Operation
Execution continues at the following instruction. Other than the PC, no registers
or flags are affected.
It is desired to produce a low-going output pulse on bit 7 of Port 2 lasting exactly
5 cycles. A simple SETB/CLR sequence would generate a one-cycle pulse, so
four additional cycles must be inserted. This may be done (assuming no
interrupts are enabled) with the instruction sequence,
CLR
NOP
NOP
NOP
NOP
SETB
1
1
NOP
(PC)
0
Preliminary
←
0
(PC) + 1
P2.7
P2.7
0
0
0 0 0 0
Page 138 of 187
Instruction Set
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