gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 16
gc80c520a
Manufacturer Part Number
gc80c520a
Description
Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
1.GC80C520A.pdf
(187 pages)
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6.1.1.2.2 Bit-addressable Memory Space
6.1.2 Special Function Registers (SFRs) Map and Description
The MiDAS1.0 family uses Special Function Registers (SFRs) to control and monitor peripherals and their
modes.
The SFRs are located at 80h-FFh and are accessed by direct addressing only. Some of the SFRs are bit
addressable. This is very useful in cases where one wishes to modify a particular bit without changing the
others. The SFRs that are bit addressable are those whose addresses end in 0h or 8h. The MiDAS1.0
family contains all the SFRs present in the standard 80C52. However, some additional SFRs have been
added. In some cases unused bits in the original 80C52 have been given new functions. The list of SFRs
is as follows. Refer to Appendix B for more details about SFRs.
use of code space, since register instructions are shorter than instructions that use direct addressing.
The next 16 bytes, locations 20H through 2FH, above the register banks form a block of bit-
addressable memory space. There are 128 bits in this area. The 128 bits can be directly addressed
by single-bit instructions. The bit addresses in this area are 00H through 7FH.
Sixteen addresses in SFR space are both byte- and bit-addressable. The bit-addressable SFRs are
those whose address ends in 000B. The bit addresses in this area are 80H through FFH.
Page 16 of 187
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