gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 14

• Manufacturer Part Number: gc80c520a
• Description: Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

6 Functional Description
6.1 CPU Description
6.1.1 Memory Organization
MiDAS1.0 family has separate address spaces for program and data memory. The logical separation of
program and data memory allows the data memory to be accessed by 8-bit addresses, which can be
quickly stored and manipulated by an 8-bit CPU.
Program Memory can only be read, not written to. There can be up to 64K bytes of Program Memory.
6.1.1.1 Program Memory
The left diagram of Figure 6-1 shows the map of the Program Memory. After reset, the CPU begins
execution from location 0000H.
0000h
(EA = 0)
External
[ Program Memory ]
PSEN
FFFFh
ROM
(Read Only)
External
Interrupt Vector
0000h
ROM
(EA = 1)
Internal
ROM
Figure 6-1 Memory Organization
30H
20H
00H
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R0
R0
R0
R0
R0
R0
R0
R0
R1
R1
R1
R1
16x8bit (128bit)
R1
R1
R1
R1
16x8bit (128bit)
Bit Addressable
Bit Addressable
(Scratch Pad)
(Scratch Pad)
R2
R2
R2
R2
R2
R2
R2
R2
80 x 8bit
80 x 8bit
R3
R3
R3
R3
R3
R3
R3
R3
R4
R4
R4
R4
R4
R4
R4
R4
R5
R5
R5
R5
R5
R5
R5
R5
R6
R6
R6
R6
R6
R6
R6
R6
R7
R7
R7
R7
R7
R7
R7
R7
7FH
2FH
BANK 3
BANK 2
BANK 1
BANK 0
80h
00h
FFh
Functional Description
(Indirect or
Refer to Family Table
Internal
Indirect)
Internal
Direct)
(Only
RAM
RAM
(Read and Write)
[ Data Memory ]
Direct)
(Only
SFR
0000h
FFFFh
WR RD
External
RAM