gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 174

• Manufacturer Part Number: gc80c520a
• Description: Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

15.27 Timer 2 Control Register (T2CON)
Bit No.
C8h
Symbol
RCLK
EXF2
TF2
R/W(0)
TF2
7
Function
Timer 2 External Flag. A negative transition on the T2EX pin (P1.1) or Timer 2
underflow/overflow will cause this flag to set based on the CP/RL2 (T2CON.0), EXEN2
(T2CON.3), and DCEN (T2MOD.0) bits. If set by a negative transition, this flag must be
cleared to 0 by software. Setting this bit in software or detection of a negative transition
on the T2EX pin will force a timer 2 interrupt if enabled.
Receive Clock Flag. This bit determines the serial port timebase when receiving data in
serial modes 1 or 3.
0: Timer 1 overflow is used to determine receiver baud rate for serial port.
1: Timer 2 overflow is used to determine receiver baud rate for serial port. Setting this
bit will force Timer 2 into baud rate generation mode. The timer will operate from a
divide by 2 of the external clock.
Timer 2 Overflow Flag. This flag will be set when Timer 2 overflow from FFFFh to 0000h
or the counter equal to the capture register in down count mode. It must be cleared by
software. TF2 will only be set if RCLK and TCLK are both cleared to 0.
CP/RL2
1
1
0
0
0
R/W(0)
EXF2
6
EXEN2
0
1
0
1
X
R/W(0)
RCLK
5
DCEN
X
X
0
0
1
R/W(0)
TCLK
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Result
Negative transition on P1.1 will not affect EXF2 bit.
Negative transition on P1.1 will set EXF2 bit.
Negative transition on P1.1 will not affect EXF2 bit.
Negative transition on P1.1 will set EXF2 bit.
EXF2 toggles whenever Timer 2 underflow/overflows and
can be used as a 17
EXF2 will not cause an interrupt.
R/W(0)
EXEN2
3
R/W(0)
TR2
2
th
bit of resolution. In this mode,
Appendix B: SFR description
R/W(0)
C/T2
1
CP/RL2
R/W(0)
0
T2CON