gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 89

• Manufacturer Part Number: gc80c520a
• Description: Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

14 Appendix A: Instruction Set
Rn
direct
@Ri
#data
#data16
addr16
Addr11
rel
bit
Notation
MiDAS1.0 Family
Register R0-R7 of the currently selected Register Bank.
8-bit internal data location’s address. This could be an IRAM location (0-127) or a SFR
(128-255).
8-bit IRAM location (0-255) addressed indirectly through register R0 or R1.
8-bit constant included in instruction
16-bit constant included in instruction
16-bit destination address. Used by LCALL & LJMP. A branch can be anywhere within
the 64Kbyte Program Memory address space.
11-bit destination address. Used by ACALL & AJMP. The branch will be within the
same 2Kbyte page of program memory as the first byte of the following instruction.
Signed (two’s complement) 8-bit offset byte. Used by SJMP and all conditional jumps.
Range is –128 to +127 bytes relative to first byte of the following instruction.
Direct addressed bit in IRAM or SFR.
Table 14-1 Note on instruction set and addressing modes
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