gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 15

• Manufacturer Part Number: gc80c520a
• Description: Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

As shown in Figure 6-1, each interrupt is assigned a fixed location in Program memory. The interrupt
causes the CPU to jump to that location, where it commences execution of the service routine. External
Interrupt 0, for example, is assigned to the location 0003h. If External Interrupt 0 is going to be used, its
service routine must begin at location 0003H. If the interrupt is not going to be used, its service location is
available as general purpose Program Memory.
The interrupt service locations are spaced at 8-byte intervals: 0003h for External Interrupt 0, 000Bh for
Timer 0, 0013h for External Interrupt 1, 001Bh for Timer 1 and etc. If an interrupt service routine is short
enough (as is often the case in control applications), it can reside entirely within that 8-byte interval.
Longer service routines can use a jump instruction to skip over subsequent interrupt locations, if other
interrupts are in use.
Program Memory addresses are always 16bits wide, even though the actual amount of used Program
Memory may be less than 64K bytes.
Program Memory can only be read, not written to. There can be up to 64K bytes of Program Memory.
6.1.1.2 Data Memory
The internal data memory address space is divided into three basic, physical separate and distinct blocks
as shown in the right diagram of Figure 6-1:
While the upper internal RAM area and the SFR area share the same address locations (80h – FFh), they
are accessed through different addressing modes. The upper internal RAM can only be accessed through
indirect addressing mode (indirect addressing with general purpose registers R0 or R1), and the special
function registers (SFRs) are accessible only by direct addressing mode (address is part of the
instruction).
6.1.1.2.1 Register Banks
The lowest 32 bytes of the internal data RAM are grouped into 4 banks of 8 general purpose
registers (GPRs). Program instructions call out these registers as R0 through R7. RS1 and RS0 bits
in the Program Status Word (PSW) select which register bank is in use. This allows more efficient
The lower 128byte of internal data RAM located to the address range 00h – 7Fh.
The upper 128byte of internal data RAM located to the address range 80h – FFh.
The 128byte area for special function register (SFR) located to the address range 80h – FFh.
MiDAS1.0 Family
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