gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 162
gc80c520a
Manufacturer Part Number
gc80c520a
Description
Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
1.GC80C520A.pdf
(187 pages)
- Current page: 162 of 187
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15.7 Timer Mode Control Register (TMOD)
Bit No.
89h
Symbol
M1, M0
M1, M0
GATE
GATE
IT0
C/T
C/T
R/W(0)
GATE
7
Interrupt 0 Type Select. This bit selects whether the /INT0 pin will detect edge or level
triggered interrupts.
0: /INT0 is level triggered.
1: /INT0 is edge triggered.
Function
Timer 1 Gate Control. This bit enables/disables the ability of Timer 1 to increment.
0: Timer 1 will clock when TR1=1, regardless of the state of /INT1.
1: Timer 1 will clock only when TR1=1 and /INT1=1.
Timer 1 Counter/Timer Select.
0: Timer 1 is incremented by internal clocks.
1: Timer 1 is incremented by pulses on T1 when TR1 (TCON.6) is 1.
Timer 1 Mode Select. These bits select the operating mode of Timer 1.
Timer 0 Gate Control. This bit enables/disables the ability of Timer 0 to increment.
0: Timer 0 will clock when TR0=1, regardless of the states of /INT0.
1: Timer 0 will clock only when TR0=1 and /INT0=1.
Timer 0 Counter/Timer Select.
0: Timer 0 is incremented by internal clocks.
1: Timer 0 is incremented by pulses on T0 when TR0 (TCON.4) is 1.
Timer 0 Mode Select. These bits select the operating mode of Timer 0. When Timer 0 is
in mode 3, TL0 is started/stopped by TR0 and TH0 is started/stopped by TR1. Run
control for Timer 1 is then provided via the Timer 1 mode selection.
M1
M1
0
0
1
1
0
R/W(0)
C/T
6
M0
M0
0
1
0
1
0
R/W(0)
M1
5
Mode
Mode 0: 8 bits with 5-bit prescale
Mode 1: 16 bits
Mode 2: 8 bits with auto-reload
Mode 3: Timer 1 is halted, but holds its count.
Mode
Mode 0: 8 bits with 5-bit prescale
R/W(0)
Page 162 of 187
M0
4
R/W(0)
GATE
3
R/W(0)
C/T
2
Appendix B: SFR description
R/W(0)
M1
1
R/W(0)
M0
0
TMOD
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