gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 28
gc80c520a
Manufacturer Part Number
gc80c520a
Description
Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
1.GC80C520A.pdf
(187 pages)
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functions will be selected according to the combination of the SFR values.
The drive characteristics of an alternate function are the same with those of general I/O. The logic 0
output pulls a pin low strongly. The logic 1 output changes a pin status with a strong pull-up and
maintains the logic 1 status with a weak pull-up. More than one port pins are assigned to alternate
functions without changing the functions of the other pins.
Note: P1.1/P1.2/P1.3 are assigned to be used as analog input pins (ADC input channel 1/2/3) by the bits
ADC1/ADC2/ADC3 (ADCSEL.1/ADCSEL.2/ADCSEL.3).
6.2.1.3 PORT 2
Port 2 is an 8-bit, bi-directional I/O port with internal pull-up resistors. The pull-up resistors are switched
on/off by the value of the SFR P2SEL. The Port 2 of the devices including internal program memory is
available as a general purpose I/O. Port 2 pins that have 1s written to them float and can be used as
high-impedance inputs. If the internal pull-up resistors are switched on, Port 2 pins are pulled high and
can be used as inputs.
Port 2 emits the high address byte during fetches from external program memory and during accesses to
external data memory that use 16-bit addresses (MOVX @DPTR). It may not be recommended that even
a device including program memory should use its Port 2 as a general purpose I/O port if the device also
accesses external memory. It is because the state of the Port 2 latch will change during any access to
CPU BUS
Alternative Function Output
ADC Block Input
Figure 6-6 Configuration of PORT1
P1.1
SFR
Digital Input
QB
Q
2 OSC
Page 28 of 187
Pulse
ADC1
Pull-
Functional Description
up
P1SEL.1
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