gc80c520a CORERIVER Semiconductor, gc80c520a Datasheet - Page 51

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gc80c520a

Manufacturer Part Number
gc80c520a
Description
Midas1.0 Family Mask Rom/eprom/romless 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
The 16 states of the counter divide each bit time into 16 ths. At the 8
bit time, the bit detector samples the value of RXD. The value accepted is the value that was seen in at
least 2 of three samples. This is done for noise rejection. If the value accepted during the first bit time is
not 0, the receive circuits are reset and the unit goes back to looking for another 1-to-0 transition. This is
to provide rejection of false start bits. If the start bit proves valid, it is shifted into the input shift register,
and reception of the rest of the frame will proceed.
After shifting in 9 data bits, there is one more shift to do, after which the SBUF and RB8 are loaded and
RI is set. However certain conditions must be met before the loading and setting of RI can be done.
If these conditions are met, then the stop bit goes to RB8, the 8 data bits go into SBUF and RI is set.
Otherwise the received frame may be lost. After the middle of the stop bit, the receiver goes back to
looking for a 1-to-0 transition on the RxD pin.
1.
2.
RI must be 0 and
Either SM2=0, or the received stop bit=1
MiDAS1.0 Family
(SMOD is PCON.7)
SMOD
F
1/2
1/2
OSC
0
1
Write to
RXD
Figure 6-22 UART Mode 2
SBUF
Transition
Detector
1-to-0
1/16
Read SBUF
Load SBUF
Sample
Serial Port
Interrupt
Page 51 of 187
D
CL
TB8
Bit Detector
S
Q
STOP BIT
START
TX CLOCK
START
RX CLOCK
Internal BUS
Internal BUS
1/16
RX CONTROL
Zero Detector
TX CONTROL
Input Shift Register
SBUF
SBUF
SHIFT
1FFh
TI
RI
(9 bits)
th
, 9
SHIFT
LOAD
DATA
SEND
SBUF
th
, and 10
Shift
th
counter states of each
TXD

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