tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 143

• Manufacturer Part Number: tmp1940cyaf
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

31
15
Bit
5:3
2:0
10.3.7
Mnemonic
DACM
SACM
DMA Transfer Control Registers (DTCRn)
Destination
Address Count
Mode
Source Address
Count Mode
Field Name
Figure 10.9 DMA Transfer Control Registers (DTCRn)
0
Selects the manner in which the destination address is incremented or decremented.
000: Counting begins with bit 0 of the DARn.
001: Counting begins with bit 4 of the DARn.
010: Counting begins with bit 8 of the DARn.
011: Counting begins with bit 12 of the DARn.
100: Counting begins with bit 16 of the DARn.
101: Reserved
110: Reserved
111: Reserved
Selects the manner in which the source address is incremented or decremented.
000: Counting begins with bit 0 of the SARn.
001: Counting begins with bit 4 of the SARn.
010: Counting begins with bit 8 of the SARn.
011: Counting begins with bit 12 of the SARn.
100: Counting begins with bit 16 of the SARn.
101: Reserved
110: Reserved
111: Reserved
TMP1940CYAF-101
0
6
5
Description
DACM
R/W
000
3
TMP1940CYAF
2
SACM
R/W
000
16
0
: Reset Value
: Read/Write
: Reset Value
: Read/Write