tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 328
tmp1940cyaf
Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1940CYAF.pdf
(464 pages)
- Current page: 328 of 464
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Clock Generator (2 of 2)
Mnemonic Name Address
IMCGA0
IMCGA1
IMCGA2
IMCGA3
IMCGB0
IMCGB1
IMCGB2
IMCGB3
EICRCG
CG Control
CG Control
CG Control
CG Control
CG Control
CG Control
CG Control
CG Control
Interrupt
Register
Interrupt
Register
Interrupt
Register
Interrupt
Register
Interrupt
Register
Interrupt
Register
Interrupt
Register
Interrupt
Register
Interrupt
Request
Register
Clear
A0
A1
A2
A3
B0
B1
B2
B3
EE10H
EE11H
EE12H
EE13H
EE14H
EE15H
EE16H
EE17H
EE20H
FFFF
FFFF
FFFF
FFFF
FFFF
FFFF
FFFF
FFFF
FFFF
7
TMP1940CYAF-286
6
Wake-up INT0 sensitivity
00: Low level
01: High level
10: Falling edge
11: Rising edge
Wake-up INT1 sensitivity
00: Low level
01: High level
10: Falling edge
11: Rising edge
Wake-up INT2 sensitivity
00: Low level
01: High level
10: Falling edge
11: Rising edge
Wake-up INT3 sensitivity
00: Low level
01: High level
10: Falling edge
11: Rising edge
Wake-up INT4 sensitivity
00: Low level
01: High level
10: Falling edge
11: Rising edge
Must be written as 10.
Must be written as 10.
Must be written as 11.
EMCG01
EMCG11
EMCG21
EMCG31
EMCG41
EMCG71
5
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
EMCG00
EMCG10
EMCG20
EMCG30
EMCG40
EMCG72
4
0
0
0
0
0
0
0
0
3
Clear interrupt request
(Only when relevant interrupts are
programmed to be used to exit
STOP/SLEEP mode.)
000: INT0
001: INT1
010: INT2
011: INT3
TMP1940CYAF
ICRCG2
2
0
100: INT4
101: Reserved
110: Reserved
111: INTRTC
ICRCG1
W
1
0
INTRTCEN
INT0
enable
0: Disable
1: Enable
INT1
enable
0: Disable
1: Enable
INT2
enable
0: Disable
1: Enable
INT3
enable
0: Disable
1: Enable
INT4
enable
0: Disable
1: Enable
Must be
written as
0.
Must be
written as
0.
INTRTC
enable
0:Disable
1: Enable
ICRCG0
INT0EN
INT1EN
INT2EN
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
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