tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 278
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tmp1940cyaf
Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1940CYAF.pdf
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This bit is set when the conversion result is loaded into the ADREGxH/L pair, and cleared when either
the ADREGxH or ADREGxL is read.
Analog Input Channel
Bit 0 (ADRxRF) in each ADREGxL register indicates whether the conversion result has been read.
Reading the conversion result clears the End-of-Conversion flag (ADMOD0.EOCF).
(Port 5)
Table 15.4 Relationships Between Analog Input Channels
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
and A/D Conversion Result Registers
Fixed-Channel Continuous
(for each sequence of four
TMP1940CYAF-236
Conversion Mode
ADREG04H/L
ADREG15H/L
ADREG26H/L
ADREG37H/L
conversions)
A/D Conversion Result Register
Other Modes
ADREG04H/L
ADREG15H/L
ADREG26H/L
ADREG37H/L
ADREG04H/L
ADREG15H/L
ADREG26H/L
ADREG37H/L
TMP1940CYAF
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