tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 374
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tmp1940cyaf
Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1940CYAF.pdf
(464 pages)
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3.3.4
3.3.5
Interleave Mode
the system clock (fsys) operates at 20 MHz or faster, the flash memory must be configured into
Interleave mode.
Block Protection
8 KB
protect bit, which can be set by executing the Block Protect command sequence. Blocks in protection
mode are protected from even the Chip Erase and Multi-Block Erase commands; these commands erase
only unprotected blocks. Since protection status is stored in flash memory cells, it is retained if the chip
is powered off.
If P86 is sampled high at the rising edge of
The TMP1940FDBF flash memory is organized into a total of 18 blocks (32 KB
1, 4KB
2). To protect stored data from any program and erase operations, each block has a
Address A
Address B
Address
Figure 3.5 Interleave Mode
Data
TMP1940FDBF-16
A0
A0
D0
A1
RESET
A1
A2
D1
A2
, the flash memory enters Interleave mode. When
D2
A3
A3
A4
D3
A4
TMP1940FDBF
15, 16 KB
1,
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