tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 192
tmp1940cyaf
Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1940CYAF.pdf
(464 pages)
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TB3MOD
(0xFFFF_F1B2)
Name
Read/Write
Reset Value
Function
Must be written as 00.
7
0
Figure 12.10 TMRB3 Mode Register
R/W
6
0
TMRB3 Mode Register
TMP1940CYAF-150
Software
capture
0: Capture
1: Don’t
TB3CP0
care
Up-counter (UC3) clear control
Capture triggers
Software capture
W*
5
1
00
01
10
11
0
1
0
1
Capture triggers
00: Disabled
01: Disabled
10: Disabled
11: TA1OUT TA1OUT
Disabled
UC3 is reset upon a match with TB3RG1.
Capture disabled
Capture disabled
Capture disabled
Latches UC3 value into TB3CP0 at rising edges of TA1OUT.
Latches UC3 value into TB3CP1 at falling edges of TA1OUT.
Latches UC3 value into TB3CP0.
Don’t care
TB3CPM1 TB3CPM0
4
0
3
0
UC3 clear
control
0: Disable
1: Enable
TB3CLE
TMP1940CYAF
R/W
2
0
TMRB3 clock source
00: TB3IN0 input
01: T1
10: T4
11: T16
TB3CLK1
1
0
TB3CLK0
0
0
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