tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 272
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tmp1940cyaf
Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1940CYAF.pdf
(464 pages)
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ADREG04L
(0xFFFF_F300)
ADREG04H
(0xFFFF_F301)
ADREG15L
(0xFFFF_F302)
ADREG15H
(0xFFFF_F303)
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Name
Read/Write
Reset Value
Function
Note 1: Bits 5–1 are always read as 1s.
Note 2: Bit 0 (ADRxRF), when set, indicates that the conversion result has been stored in the
Channel x conversion result bits
ADREGxH/L register pair. This bit is cleared when either the ADREGxH or the ADREGxL is read.
Figure 15.4 A/D Convesion Result High/Low Registers (1)
Lower 2 bits of an A/D
conversion result
Lower 2 bits of an A/D
conversion result
ADR01
ADR09
ADR11
ADR19
7
7
7
7
A/D Conversion Result High Register 0/4
A/D Conversion Result High Register 1/5
A/D Conversion Result Low Register 0/4
A/D Conversion Result Low Register 1/5
Undefined
Undefined
R
R
ADR00
ADR08
ADR10
ADR18
6
6
6
6
TMP1940CYAF-230
ADREGxH
9
7
8
6
ADR07
ADR17
Upper 8 bits of an A/D conversion result
Upper 8 bits of an A/D conversion result
5
5
5
5
5
7
4
6
ADR06
ADR16
3
5
4
4
4
4
2
Undefined
Undefined
4
R
R
1
3
ADR05
ADR15
0
3
3
3
3
2
7
1
TMP1940CYAF
ADR04
ADR14
6
2
2
2
2
0
5
4
ADR03
ADR13
1
1
1
1
3
2
ADREGxL
Conversion
result store
flag
1: Stored
Conversion
result store
flag
1: Stored
ADR0RF
ADR1RF
1
ADR02
ADR12
0
R
0
0
R
0
0
0
0
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