tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 299
tmp1940cyaf
Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1940CYAF.pdf
(464 pages)
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18.7.2
Transmit Data
Receive Data
SCK
(SO)
Clock-Synchronous 8-Bit SIO Mode
letter n denotes the value of n programmed into the SCK[2:0] (SCL output frequency select) field in the
SBI0CR1.
(1) SCK Input Mode
(2) SCK Output Mode
(SI)
SCK period
SO data to SCK rise
SO data hold after SCK rise
SI data valid to SCK rise
SI data hold after SCK rise
SCK period (programmable)
SO data to SCK rise
SO data hold after SCK rise
SI data valid to SCK rise
SI data hold after SCK rise
In the tables below, the letters x and T represent the fsys and T0 cycle periods, respectively. The
The electrical specifications below are for an SCK signal with a 50% duty cycle.
Parameter
Parameter
t
t
OSS
SRD
VALID
0
t
0
SCY
TMP1940CYAF-257
t
t
t
t
t
t
t
t
t
t
Symbol
Symbol
SCY
OSS
OHS
SRD
HSR
SCY
OSS
OHS
SRD
HSR
VALID
1
(t
1
SCY
(t
(t
(t
SCY
SCY
SCY
t
/2)
HSR
4x
2x
2
Min
Min
16x
n
/2)
/2)
/2)
t
0
0
Equation
Equation
OHS
(6x
10
30
T
4x
20
20
30)
VALID
2
Max
Max
2
TMP1940CYAF
1000
Min
Min
500
375
135
480
480
32
93
0
0
32 MHz
32 MHz
Max
Max
VALID
3
3
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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