tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 213
tmp1940cyaf
Manufacturer Part Number
tmp1940cyaf
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP1940CYAF.pdf
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(3) Calculation Examples
(4) Using an External Clock as a Serial Clock
generator. When an external clock is used, the baud rate is determined as shown below.
clock inputs and clock divisor values.
The SIO0 and SIO1 can use an external clock as a serial clock, bypassing the baud rate
Table 13.3 and Table 13.4 show the UART baud rates obtained with various combinations of
Clocking conditions
The baud rate is determined as follows:
Clocking conditions
The baud rate is determined as follows:
Integral Clock Division (Divide-by-N)
fperiph = 24.576-MHz fc
Baud rate generator input clock: T2
Clock divisor N (BR0CR.BR0S[3:0]) = 10
BR0CR.BR0ADDE = 0
N + (16 – K) / 16 Clock Division (UART mode only)
fperiph = 19.2-MHz fc
Baud rate generator input clock: T2
N (BR0CR.BR0S[3:0]) = 7
K (BR0ADD.BR0K[3:0]) = 3
BR0CR.BR0ADDE = 1
UART Mode
32 MHz, the maximum baud rate is 500 kbps (32
T0 = fperiph/4
T0 = fperiph/4
Note:
24.576
Baud Rate = external clock input
The external clock period must be greater than or equal to 4/fsys. Therefore, when fsys =
System clock:
High-speed clock gear:×1 (fc)
Prescaler clock:
Baud Rate
System clock:
High-speed clock gear:×1 (fc)
Prescaler clock:
Baud Rate
19.2
Clearing the BR0CR.BR0ADDE bit to 0 disables the N + (16 – K) / 16 clock division
function. At this time, the BR0ADD.BR0K[3:0] field is ignored.
10
10
6
6
16
fc/16
7
10
16
+
fc
(16
TMP1940CYAF-171
/
10
16
16
(7
-
16
3)
High-speed (fc)
fperiph/4 (fperiph fsys)
High-speed (fc)
fperiph/4 (fperiph fsys)
16
13
16
16
)
9600 (bps)
16
16
9600 (bps)
4
16).
TMP1940CYAF
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