tmp1940cyaf TOSHIBA Semiconductor CORPORATION, tmp1940cyaf Datasheet - Page 225

• Manufacturer Part Number: tmp1940cyaf
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

SC1CR
(0xFFFF_F209)
Name
Read/Write
Reset Value
Function
Note 1: All error flags are cleared to 0 when read.
Note 2: When SCLK1 is configured as an output, the SCLKS bit must be cleared (rising-edge triggered).
Bit 8 of a
received
character
Figure 13.14 SIO1 Control Register (SC1CR)
RB8
7
R
Parity type
0: Odd
1: Even
EVEN
6
0
TMP1940CYAF-183
R/W
Parity
0: Disabled
1: Enabled
PE
5
0
Overrun
OERR
4
0
R (Cleared when read)
1: Error has occurred.
Parity
Input clock in I/O Interface mode
Active edge for the SCLK1 input
Framing error flag
Parity error flag
Overrun error flag
Input clock in I/O Interface mode
PERR
3
0
0
1
0
1
0
1
Baud rate generator
SCLK1 input
Data is transmitted/received
on the SCLK1 rising edge.
Data is transmitted/received
on the SCLK1 falling edge.
Odd parity
Even parity
Framing
TMP1940CYAF
FERR
2
0
These bits are cleared
to 0 when read.
0: SCLK1
1: SCLK1
SCLKS
1
0
R/W
0: Baud rate
1: SCLK1
generator
input
IOC
0
0