lrs1383 Sharp Microelectronics of the Americas, lrs1383 Datasheet - Page 103

• Manufacturer Part Number: lrs1383
• Description: Stacked Chip 32m Flash And 8m Sram
• Manufacturer: Sharp Microelectronics of the Americas

5 Design Considerations
5.1 Hardware Design Considerations
5.1.1 Control using RST#, CE# and OE#
The device will often be used in large memory arrays.
SHARP
accommodate multiple memory connection. Three
control input pins, RST#, CE# and OE# provide for:
To effectively use these control input pins, access the
desired memory by enabling the CE# through the address
decoder. Connect OE# to READ# control signal of all
memory devices and system. With these connections, the
selected memory devices are activated and deselected
memory devices are in standby mode. RST# should be
connected to the system POWERGOOD signal to prevent
unintended writes during system power transitions.
POWERGOOD should toggle (once set to V
system reset.
5.1.2 Power Supply Decoupling
Flash memory’s power switching characteristics require
careful device decoupling for eliminating noises to the
system power lines. System designers should consider
standby current levels (I
and transient peaks produced by falling and rising edges
of CE# and OE#. Transient current magnitudes depend on
the device outputs’ capacitive and inductive loading.
Two-line control and proper decoupling capacitor
selection will suppress these transient voltage peaks. Each
flash device should have a 0.1 F ceramic capacitor
connected between each V
between V
supply). These high-frequency, inherently low-inductance
capacitors should be placed as close as possible to the
package leads. Additionally, for every eight devices, a
4.7 F electrolytic capacitor should be placed at the
array’s power supply connection between V
These capacitors will overcome voltage slumps caused by
circuit board trace inductance.
• Minimize the power consumption of the memory
• Avoid data confliction on the data bus
provides
PP
and GND (when V
three
CCS
), active current levels (I
Appendix to Spec No.: MFM2-J13207
CC
control
, V
CCQ
PP
input
is used as 12V
and GND and
CC
IL
and GND.
pins
) during
CCR
FUM00701
to
)
Model No.: LRS1383
5.1.3 V
The V
Flash memory is only used to monitor the power supply
voltage and is not used for a power supply pin except for
12V supply. Therefore, even when on-board writing to
the flash memory on the system, it is not required to
consider that V
circuit boards.
However, in erase or program operations with applying
12V±0.3V to V
pin. When executing these operations, V
and layout should be similar to that of V
flash memory cells current for erasing or programming.
Adequate V
placed adjacent to the component, will decrease spikes
and overshoots.
5.1.4 V
If V
RST# is not at V
buffer) program and OTP program operation are not
guaranteed. When V
register bits SR.5 or SR.4 (depending on the attempted
operation) and SR.3 will be set to "1". If RST# transitions
to V
buffer) program or OTP program operation, the status
register bit SR.7 will remain "0" until reset operation has
been completed. Then, the attempted operation will be
aborted and the device will enter reset mode after the
completion of the reset sequence. If RST# is taken V
during a block erase, full chip erase, (page buffer)
program or OTP program operation, the memory contents
at the aborted location are no longer valid. Therefore, the
proper command must be written again. And also, if V
transitions to lower than V
chip erase, (page buffer) program or OTP program
operation, the attempted operation will be aborted and the
memory contents at the aborted location are no longer
valid. Write the proper command again after V
transitions above V
PP
IL
PP
is lower than V
during the block erase, full chip erase, (page
pin on the LH28F320BX/LH28F640BX series
PP
CC
PP
, V
Traces on Printed Circuit Boards
supply traces, and decoupling capacitors
PP
March 1, 2001
PP
PP
IH
pin, V
LKO
, RST# Transitions
supplies the currents on the printed
, block erase, full chip erase, (page
PP
PPLK
.
PP
error is detected, the status
LKO
, V
is used for the power supply
CC
during a block erase, full
is lower than V
CC
PP
to supply the
trace widths
Rev. 2.20
LKO
57
, or
CC
CC
IL