lrs1383 Sharp Microelectronics of the Americas, lrs1383 Datasheet - Page 12

• Manufacturer Part Number: lrs1383
• Description: Stacked Chip 32m Flash And 8m Sram
• Manufacturer: Sharp Microelectronics of the Americas

5.2 Identifier Codes and OTP Address for Read Operation
Notes:
5.3 Identifier Codes and OTP Address for Read Operation on Partition Configuration
Notes:
Manufacturer Code
Device Code
Block Lock Configuration Code
Device Configuration Code
OTP
1. The address A
2. Bottom parameter device has its parameter blocks in the plane 0 (The lowest address).
3. DQ
4. PCRC=Partition Configuration Register Code.
5. OTP-LK=OTP Block Lock configuration.
6. OTP=OTP Block data.
1. The address to read the identifier codes or OTP data is dependent on the partition which is selected when writing the Read
shown in below table.
Identifier Codes/OTP command (90H).
PCR.10
15
0
0
0
1
0
1
1
1
-DQ
Partition Configuration Register
2
is reserved for future implementation.
20
-A
16
to read the manufacturer, device, lock configuration, device configuration code and OTP data are
PCR.9
0
0
1
0
1
1
0
1
Manufacturer Code
32M Bottom Parameter Device Code
Block is Unlocked
Block is Locked
Block is not Locked-Down
Block is Locked-Down
Partition Configuration Register
OTP Lock
OTP
PCR.8
0
1
0
0
1
0
1
1
Code
L R S1 3 8 3
00H
00H or 08H
00H or 10H
00H or 18H
00H or 08H or 10H
00H or 10H or 18H
00H or 08H or 18H
00H or 08H or 10H or 18H
Address (32M-bit device)
0081-0088H
[A
(1)
Address
Address
0000H
0001H
0006H
0080H
15
Block
+ 2
-A
[A
0
]
20
(1)
-A
16
]
[DQ
OTP-LK
DQ
DQ
DQ
DQ
00B0H
00B5H
PCRC
Data
OTP
15
0
0
1
1
-DQ
= 0
= 1
= 0
= 1
0
]
Notes
2
3
3
3
3
4
5
6
10