lrs1383 Sharp Microelectronics of the Americas, lrs1383 Datasheet - Page 28

• Manufacturer Part Number: lrs1383
• Description: Stacked Chip 32m Flash And 8m Sram
• Manufacturer: Sharp Microelectronics of the Americas

12.6 Reset Operations
Notes:
AC Waveform for Reset Operation
1. A reset time, t
2.
3. Sampled, not 100% tested.
4.
5. When the device power-up, holding F-RST low minimum 100ns is required after F-V
Symbol
t
t
t
VHQV
t
PLPH
PLRH
VPH
are valid. See the AC Characteristics - read cycle for t
the reset will complete within 100ns.
also has been in stable there.
t
If F-RST asserted while a block erase, full chip erase, (page buffer) program or OTP program operation is not executing,
PLPH
is <100ns the device may still reset but this is not guaranteed.
F-RST Low to Reset during Read
(F-RST should be low during power-up.)
F-RST Low to Reset during Erase or Program
F-V
F-V
CC
CC
PHQV
2.7V to F-RST High
2.7V to Output Delay
(1,2)
, is required from the later of SR.7 (F-RY/BY) going "1" (High-Z) or F-RST going high until outputs
Parameter
L R S1 3 8 3
PHQV
.
1, 2, 3
1, 3, 4
1, 3, 5
Notes
(T
3
A
= -25°C to +85°C, F-V
CC
Min.
100
100
has been in predefined range and
Max.
22
1
CC
= 2.7V to 3.3V)
Unit
ms
ns
ns
s
26