lrs1383 Sharp Microelectronics of the Americas, lrs1383 Datasheet - Page 66

• Manufacturer Part Number: lrs1383
• Description: Stacked Chip 32m Flash And 8m Sram
• Manufacturer: Sharp Microelectronics of the Americas

7. Following the third bus cycle, inputs the program sequential address and write data of "N" times. Finally, input the any
8. If the program operation in one partition is suspended and the erase operation in other partition is also suspended, the
9. Full chip erase and OTP program operations can not be suspended. The OTP Program command can not be accepted
10. Following the Clear Block Lock Bit command, block which is not locked-down is unlocked when WP# is V
11. Commands other than those shown above are reserved by SHARP for future device implementations and should not be
valid address within the target partition to be programmed and the confirm command (D0H). Refer to Appendix of
LH28F320BX/LH28F640BX series for details.
suspended program operation should be resumed first, and then the suspended erase operation should be resumed next.
while the block erase operation is being suspended.
WP# is V
used.
IH
, lock-down bit is disabled and the selected block is unlocked regardless of lock-down configuration.
Appendix to Spec No.: MFM2-J13207
FUM00701
Model No.: LRS1383
March 1, 2001
Rev. 2.20
IL
. When
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