gc41c501g0-sp8i CORERIVER Semiconductor, gc41c501g0-sp8i Datasheet - Page 19

• Manufacturer Part Number: gc41c501g0-sp8i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

Preliminary
6.5. I/O Ports : PORT0 ~ PORT4
All ports are initialized asynchronously on power-up.
Pull-up enable and input by default (reset).
Open drain active low output.
P2[3:0] may be configured as push-pull output port.
CPU always write to SFR register, but reads port pin.
Retains the previous state in stop mode or sleep mode.
P2OEN
30 KΩ
30 KΩ
Q
P0.1
CPU Write
Q
P2.1
P0.1
CPU Write
P2.1
SFR
SFR
QB
QB
CPU Read
CPU Read
Circuit of P0[3:0], P1[3:0], P3[3:0], P4[3:2]
Circuit of P2[3:0]
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ATOM1.0 Family