gc41c501g0-sp8i CORERIVER Semiconductor, gc41c501g0-sp8i Datasheet - Page 55

• Manufacturer Part Number: gc41c501g0-sp8i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

MOV @DP, A
MOV A, #data
Appendix A : Instruction Set (14/19)
Binary Code
Binary Code
Description
Description
Carry Flag
Carry Flag
Operation
Operation
Example
Example
Cycles
Cycles
Bytes
Bytes
The contents of ACC is copied to data memory
whose address is given by DPTR.
M[DP] ← (A)
Not affected.
1
1
MOV H, #2
MOV L, #14
MOV @DP, A
Sets ACC with the data given
(A) ← #data
Not affected.
1
1
MOV A, #-1
MOV A, #0xC ; (A) ← 12
in four low-order bits of opcode.
1000
0101
0011
dddd
; (A) ← 15
; (H) ← 2
; (L) ← 14
MOV A, @DP
MOV A, dir
Binary Code
Binary Code
Description
Description
Carry Flag
Carry Flag
Operation
Operation
Example
Example
Cycles
Cycles
Bytes
Bytes
Copies the contents of data memory to ACC.
The address of memory is given by DPTR.
(A) ← M[DP]
Not affected.
1
1
MOV H, #1
MOV L, #0
MOV A, @DP
The contents of SFR is copied to ACC.
bits of opcode.
(A) ← R[dir]
Not affected.
1
1
MOV A, P0
MOV A, L
MOV A, SPH
The address of SFR is given by four low-order
1000
0111
ATOM1.0 Family
0000
dddd
; Read Port-0 into ACC.
; Move DPL to ACC.
; Move SPH to ACC.
; (H) ← 1
; (L) ← 0
Preliminary
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