gc41c501g0-sp8i CORERIVER Semiconductor, gc41c501g0-sp8i Datasheet - Page 64

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gc41c501g0-sp8i

Manufacturer Part Number
gc41c501g0-sp8i
Description
4-bit Microcontrollers With Reduced 8051 Architecture With Reduced 8051 Architecture
Manufacturer
CORERIVER Semiconductor
Datasheet
Appendix C : Update History
V1.0
V1.1
V1.2
V1.3
V1.4
V1.5
First Official Release
Modify Internal Ring Spec.
Add Internal Ring OSC. Slide
Modify Operating frequency
Added GC49C501RX devices.
Description for POR condition.
LVOFF flag is not supported any more.
Modify Internal Ring Spec.
Add E.S.D. Spec.
Enhanced description for 8-pin devices.
Optional power-fail reset is not supported any
more.
V1.6
Add 20-SOIC (JEDEC) Package
Modify Package Dimensions
Now POR block has no limitation for the power
rising slope.
ATOM1.0 Family
Preliminary
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