gc41c501g0-sp8i CORERIVER Semiconductor, gc41c501g0-sp8i Datasheet - Page 61

• Manufacturer Part Number: gc41c501g0-sp8i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

[How to Read a SFR Descriptions]
P2
P0
P4
DPL
Appendix B :
R/W(1)
R/W(1)
R/W(1)
R/W(0)
DPL.3
(08h) : Port 2 Output Register
P2.3
(00h) : Port 0 Output Register
P0.3
(01h) : Port 4 Output Register
P4.3
SFR Address
(02h) : The Low Nibble of Data Pointer (DPTR)
R/W(1)
R/W(1)
R/W(1)
R/W(0)
DPL.2
P2.2
P0.2
P4.2
SFR Description [00h ~ 07h]
Yellow Color : Bit Addressable
White Color : Byte Addressable
R/W(1)
R/W(1)
R/W(1)
R/W(0)
DPL.1
P2.1
P0.1
P4.1
R
W : Unrestricted Write
(n) : Reset Value
: Unrestricted Read
R/W(1)
R/W(1)
R/W(1)
R/W(0)
DPL.0
P2.0
P0.0
P4.0
DPH
P1
REMC
SPL
SPH
PG[2:0] : Carrier frequency selection.
REME
Indicate where stack will start.
Increment by PUSH and decrement by POP.
R/W(1)
R/W(0)
R/W(1)
REME
SP.3
(04h) : Port 1 Output Register
P1.3
-
(06h) : The Low Nibble of Stack Pointer (SP)
-
(07h) : The High Nibble of Stack Pointer (SP)
(03h) : The High Nibble of Data Pointer (DPTR)
(05h) : The REM Output Control Register
: REM output enable.
R/W(1)
R/W(0)
R/W(1)
P1.2
SP.2
PG2
-
-
(1/3)
ATOM1.0 Family
R/W(0)
R/W(1)
R/W(0)
R/W(1)
R/W(0)
DPH.1
SPh.1
P1.1
SP.1
PG1
Preliminary
R/W(0)
R/W(1)
R/W(0)
R/W(1)
R/W(1)
DPH.0
SPh.0
P1.0
SP.0
PG0
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