gc41c501g0-sp8i CORERIVER Semiconductor, gc41c501g0-sp8i Datasheet - Page 51

• Manufacturer Part Number: gc41c501g0-sp8i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

DJNZ A, rel
Appendix A : Instruction Set (10/19)
Binary Code
Description
Carry Flag
Operation
ACC_NZ:
Example
Cycles
Bytes
Decrements the contents of ACC, and
branches if the result is not zero.
The branch destination is computed by adding
the signed relative-displacement in the
second byte of the instruction to the PC, after
incrementing the PC to the start of the next
instruction.
Carry is cleared when the borrow occurs;
(PC) ← (PC) + 2
(A) ← (A) - 1
IF (A)
IF (A) = 0 THEN (C) ← 0
2
2
MOV A, @DP
DJNZ A, ACC_NZ
......
JNC ACC_ZERO
......
otherwise, carry is set.
1001
≠
0 THEN (PC) ← (PC) + rel
0001
ELSE (C) ← 1.
rrrr
rrrr
INC @DP
INC A
Binary Code
Binary Code
Description
Description
Carry Flag
Carry Flag
Operation
Operation
Example
Example
Cycles
Cycles
Bytes
Bytes
Increments the value of data memory
addressed indirectly by DPTR.
M[DP] ← M[DP] + 1
Not affected.
1
1
Increments the contents of ACC.
This is the same as "ADD A, #1".
Carry is set when the overflow occurs;
(A) ← (A) + 1
IF (A) = 15 THEN C ← 1
1
1
INC A
INC @DP
otherwise, carry is cleared.
0000
0001
ATOM1.0 Family
0110
0001
ELSE C ← 0.
Preliminary
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