gc41c501g0-sp8i CORERIVER Semiconductor, gc41c501g0-sp8i Datasheet - Page 57
gc41c501g0-sp8i
Manufacturer Part Number
gc41c501g0-sp8i
Description
4-bit Microcontrollers With Reduced 8051 Architecture With Reduced 8051 Architecture
Manufacturer
CORERIVER Semiconductor
Datasheet
1.GC41C501G0-SP8I.pdf
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MOVD @DP, A
MOVI @DP, A
Appendix A : Instruction Set (16/19)
Binary Code
Binary Code
Description
Description
Carry Flag
Carry Flag
Operation
Operation
Example
Example
Cycles
Cycles
Bytes
Bytes
The contents of ACC is copied to data memory
whose address is given by DPTR. After that the
data pointer is decremented.
M[DP] ← (A)
(DP) ← (DP) - 1
Not affected.
1
1
The contents of ACC is copied to data memory
whose address is given by DPTR. After that the
data pointer is incremented.
M[DP] ← (A)
(DP) ← (DP) +1
Not affected.
1
1
MOVD @DP, A
MOVI @DP, A
1000
1000
0101
0100
MOVI @DP, #data
Binary Code
Description
Carry Flag
Operation
Example
TABLE:
Cycles
Bytes
Set data memory whose address is given by
DPTR with the data given in four low-order bits
of opcode. After that the data pointer is
incremented.
M[DP] ← #data
(DP) ← (DP) + 1
Not affected.
1
1
; Simple look-up of constant values
MOV L, #0
MOV H, #1
CALL TABLE
.....
MOVI @DP, #0xC
MOVI @DP, #0x0
MOVI @DP, #0x0
MOVI @DP, #0x1
RET
0100
ATOM1.0 Family
dddd
; look-up values
; Pointer to store
Preliminary
[57]
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