gc41c501g0-sp8i CORERIVER Semiconductor, gc41c501g0-sp8i Datasheet - Page 56

• Manufacturer Part Number: gc41c501g0-sp8i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

MOV H, #data
MOV L, #data
Appendix A : Instruction Set (15/19)
Binary Code
Binary Code
Description
Description
Carry Flag
Carry Flag
Operation
Operation
Example
Example
Cycles
Cycles
Bytes
Bytes
Sets DPH with the data given
(H) ← #data
Not affected.
1
1
MOV H, #1
Sets DPL with the data given
(L) ← #data
Not affected.
1
1
MOV L, #5
in four low-order bits of opcode.
in four low-order bits of opcode.
0011
0010
dddd
dddd
; (L) ← 5
; (H) ← 1
MOV L, @DP
MOV dir, A
Binary Code
Binary Code
Description
Description
Carry Flag
Carry Flag
Operation
Operation
Example
Example
Cycles
Cycles
Bytes
Bytes
Copies the contents of data memory to DPL.
The address of memory is given by DPTR.
(L) ← M[DP]
Not affected.
1
1
MOV H, #0
MOV L, #3
MOV L, @DP ; L is changed to M[DP]
The contents of ACC is copied to SFR.
bits of opcode.
R[dir] ← (A)
Not affected.
1
1
MOV P0, A
MOV H, A
MOV DPH, A
MOV SPL, A
The address of SFR is given by four low-order
1000
0110
ATOM1.0 Family
0010
dddd
; Move ACC to DPH.
; Move ACC to DPH.
; Move ACC to SPL.
; Output ACC to Port-0.
Preliminary
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