gc41c501g0-sp8i CORERIVER Semiconductor, gc41c501g0-sp8i Datasheet - Page 30

• Manufacturer Part Number: gc41c501g0-sp8i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

Changes to Low
6.10. Reset Circuit
Reset Sources
Device Reset Timer
STOP mode Wake-up by changes in input port P0 or P1.
WDT Overflow for abnormal condition or SLEEP mode.
Clock source change (State change of CKCFG[3]).
Once set, internal reset remains high until the DRT (Device Reset Timer) is expired.
The reset time depends on the configuration of system clock in CKCFG SFR.
For an instance, the period for 2
Note that CKCFG is not affected by internal reset.
For power-on reset, the reset time is about 4.5 ms.
Power-on Reset (POR) when Power-Up.
Power-fail Reset
V
P0,P1
DD
F
F
OSC
SYS
STOP mode
LVD RESET
Generation
Generation
Counter
Clock
WDT
Wake-Up
Overflow
Change
POR / PFR
XT/RG
12
is 9 ms when F
F
SYS
Reset
DRT
SYS
Device Reset
Timer (2
is 455 KHz.
12
)
Time
Out
R
S
Q
ATOM1.0 Family
Internal RESET
Preliminary
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