gc41c501g0-sp8i CORERIVER Semiconductor, gc41c501g0-sp8i Datasheet - Page 42

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gc41c501g0-sp8i

Manufacturer Part Number
gc41c501g0-sp8i
Description
4-bit Microcontrollers With Reduced 8051 Architecture With Reduced 8051 Architecture
Manufacturer
CORERIVER Semiconductor
Datasheet
Symbol
Appendix A : Instruction Set (1/19)
Abbreviations and Symbols
#data
{b,b}
(DP)
F[L]
DP
PC
SP
dir
bit
@
+
&
=
H
A
C
>
L
^
Description
The program counter.
The accumulator register (ACC).
The carry flag.
The stack pointer register.
Concatenation of SPH and SPL.
The contents of DPTR.
The data pointer register (DPTR).
The high nibble of the data pointer (DPH).
The low nibble of the data pointer (DPL).
The contents of indirect function flag (IFF)
addressed by DPL.
4-bit data operand
4-bit direct address of SFRs (0 ≤ dir ≤ 15)
2-bit pointer of the bit in data memory
addressed by DPTR (0 ≤ bit ≤ 3).
Prefix for indirect address
Less than or equal to
Transfer
Equal to
Greater than
Addition
Bitwise logical AND
Bitwise logical Exclusive-OR
Concatenation of bits
Concatenation of DPH and DPL.
M[DP].bit
Symbol
M[DP]
M[SP]
R[dir]
Pm.n
addr
(PC)
(SP)
(H)
(A)
(C)
(L)
rel
~
<
-
|
.
Description
The contents of PC.
The contents of ACC.
The contents of C.
The contents of RAM addressed by SP.
The contents of SP.
The contents of RAM addressed by DPTR.
The contents of DPH.
The contents of DPL.
8-bit signed displacement value for relative
branch (-128 ≤ rel ≤ 127).
12-bit absolute branch address.
The contents of SFR or read value of ports.
The value of memory bit which is addressed
by DPTR and bit.
Value of bit n of I/O port m.
Value of PC for current instruction.
Exchange
Not equal to
Less than
Subtraction
Bitwise logical OR
Bitwise logical complement
ATOM1.0 Family
Preliminary
[42]

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