SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 100

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SC2200

Manufacturer Part Number
SC2200
Description
Thin Client On a Chip
Manufacturer
NSC [National Semiconductor]
Datasheet

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SuperI/O Module
4.2
The SIO module comprises a collection of generic func-
tional blocks. Each functional block is described in detail
later in this chapter. The beginning of this chapter
describes the SIO structure and provides all device specific
information, including special implementation of generic
blocks, system interface and device configuration.
The SIO module is based on eight logical devices, the host
interface, and a central configuration register set, all built
around a central, internal 8-bit bus.
The host interface serves as a bridge between the external
ISA interface and the internal bus. It supports 8-bit I/O
read, 8-bit I/O write and 8-bit DMA transactions, as defined
in Personal Computer Bus Standard P996 .
SLIN#/ASTRB#
AFD#/DSTRB#
STB#/WRITE#
BUSY/WAIT#
MODULE ARCHITECTURE
PD[7:0]
Internal
Real-Time Clock (RTC)
Signal
ERR#
ACK#
AB1C
AB1D
AB2C
AB2D
SLCT
INIT#
PE
ACCESS.
ACCESS.
(Continued)
Parallel
bus 1
bus 2
Port
Figure 4-2. Detailed SIO Block Diagram
Port/Serial Port 3
Communication
Configuration
100
Infrared
and Control
Registers
Wakeup
System
The central configuration register set supports ACPI com-
pliant PnP configuration. The configuration registers are
structured as a subset of the Plug and Play Standard Reg-
isters, defined in Appendix A of the Plug and Play ISA
Specification Version 1.0a by Intel and Microsoft. All sys-
tem resources assigned to the functional blocks (I/O
address space, DMA channels and IRQ lines) are config-
ured in, and managed by, the central configuration register
set. In addition, some function-specific parameters are con-
figurable through this unit and distributed to the functional
blocks through special control signals.
The source of the device internal clocks is the 48 MHz
clock signal or through the 32.768 KHz crystal with an
internal frequency multiplier. RTC operates on a 32 KHz
clock.
Internal Signals
Interface
Internal
Serial
Port 1
Port 2
Serial
Host
SIN1
SOUT1
DTR#/BOUT1
SIN2
SOUT2
RTS2#
DTR2#/BOUT2
CTS2
RI2#
DCD2#
DSR2#
TC
DACK0-3
DRQ0-3
IRQ1-12,14-15
IOCHRDY
ZWS#
IOWR#
IORD#
AEN
Internal
Signals
Revision 3.0

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