SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 331

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SC2200

Manufacturer Part Number
SC2200
Description
Thin Client On a Chip
Manufacturer
NSC [National Semiconductor]
Datasheet

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Revision 3.0
Video Processor Module
6.2.4
The Video Processor supports VESA, DDSC2B, and
DPMS standards for enhanced monitor communications
and power management support. This support is provided
via signals DDC_SCL (muxed with IDE_DATA10) and
DDC_SDA (muxed with IDE_DATA9). F4BAR0+Memory
Offset 04h[24, 23, 22] controls the interface.
6.2.5
The Video Processor uses a Digital to Analog Converter
(DAC) for CRT display.
To interface directly with the CRT display, the Video Pro-
cessor incorporates triple 8-bit video DACs. The integrated
DACs drive the RED, GREEN and BLUE inputs of the CRT.
Each integrated DAC is an 8-bit current output type which
can run at a clock rate of up to 135 MHz. The integrated
DAC can generate voltage levels from 0 to 1.0V, when driv-
ing 75
VESA DDSC2B and DPMS Support
Integrated DACs
double-terminated loads.
AV
SS
DAC
(Continued)
Figure 6-13. DAC Voltage Levels
R
L
331
Differential and integral linearity errors, over full tempera-
ture and voltage ranges, are less than one LSB.
The peak white voltage (V
generated at the DAC, is defined according to the following
formula:
where:
V
ence, or externally connected voltage reference).
AV
R
REF
SET
SS
V
is the voltage at VREF (either internal bandgap refer-
(typically 470 ).
FR
is the value of resistance between SETRES and
= 3.35(V
REF
R
L
/ R
SET
Monitor
CRT
FR
)
*
75
- full range output voltage),
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