SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 15

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

Revision 3.0
Architecture Overview
GX_BASE+8414h-8417h
GX_BASE+8418h-841Bh
GX_BASE+841Ch-841Fh
31:18
15:12
31:10
10:0
31:2
9:0
Bit
17
16
11
1
0
Description
RSVD (Reserved). Write as 0.
TE (Test Enable TEST[3:0]).
0: TEST[3:0] are driven low (normal operation).
1: TEST[3:0] pins are used to output test information
TECTL (Test Enable Shared Control Pins).
0: RASB#, CASB#, CKEB, WEB# (normal operation).
1: RASB#, CASB#, CKEB, WEB# are used to output test information
SEL (Select). This field is used for debug purposes only and should be left at zero for normal operation.
RSVD (Reserved). Write as 0.
GBADD (Graphics Base Address). This field indicates the graphics memory base address, which is programmable on 512
KB boundaries. This field corresponds to address bits [29:19].
Note that BC_DRAM_TOP must be set to a value lower than the Graphics Base Address.
RSVD (Reserved). Write as 0.
DRADD (Dirty RAM Address). This field is the address index that is used to access the Dirty RAM with the MC_DR_ACC
register. This field does not auto increment.
RSVD (Reserved). Write as 0.
D (Dirty Bit). This bit is read/write accessible.
V (Valid Bit). This bit is read/write accessible.
Table 1-2. SC2200 Memory Controller Registers (Continued)
(Continued)
MC_GBASE_ADD (R/W)
MC_DR_ADD (R/W)
MC_DR_ACC (R/W)
15
Reset Value: 00000000h
Reset Value: 00000000h
Reset Value: 0000000xh
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