SC2200 NSC [National Semiconductor], SC2200 Datasheet - Page 61

• Manufacturer Part Number: SC2200
• Description: Thin Client On a Chip
• Manufacturer: NSC [National Semiconductor]

Revision 3.0
Signal Definitions
2.4.5
2.4.6
Signal Name
AB2D
Signal Name
PCICLK
PCICLK0
PCICLK1
AD[31:24]
AD[23:0]
C/BE3#
C/BE2#
C/BE1#
C/BE0#
ACCESS.bus Interface Signals (Continued)
PCI Bus Interface Signals
Table 2-3
on page
EBGA
EBGA
AL11
See
A10
A13
32.
E2
D3
E4
A8
D8
(Continued)
BalL No.
Ball No.
TEPBGA
TEPBGA
Table 2-5
on page
M29
See
D6
47.
H4
A7
A4
F3
J2
L1
Type
Type
I/O
I/O
I/O
O
O
I
Description
ACCESS.bus 2 Serial Data. This is the bidi-
rectional serial data signal for the interface.
Note: If AB2D function is selected but not
Description
PCI Clock. PCICLK provides timing for all
transactions on the PCI bus. All other PCI
signals are sampled on the rising edge of
PCICLK, and all timing parameters are
defined with respect to this edge.
PCI Clock Outputs. PCICLK0 and PCICLK1
provide clock drives for the system at 33
MHz. These clocks are asynchronous to PCI
signals. There is low skew between all out-
puts. One of these clock signals should be
connected to the PCICLK input. All PCI clock
users in the system (including PCICLK)
should receive the clock with as low a skew
as possible.
Multiplexed Address and Data. A bus
transaction consists of an address phase in
the cycle in which FRAME# is asserted fol-
lowed by one or more data phases. During
the address phase, AD[31:0] contain a physi-
cal 32-bit address. For I/O, this is a byte
address. For configuration and memory, it is
a DWORD address. During data phases,
AD[7:0] contain the least significant byte
(LSB) and AD[31:24] contain the most signifi-
cant byte (MSB).
Multiplexed Command and Byte Enables.
During the address phase of a transaction
when FRAME# is active, C/BE[3:0]# define
the bus command. During the data phase,
C/BE[3:0]# are used as byte enables. The
byte enables are valid for the entire data
phase and determine which byte lanes carry
meaningful data. C/BE0# applies to byte 0
(LSB) and C/BE3# applies to byte 3 (MSB).
61
used, tie AB2D high.
FPCI_MON (Strap)
LPC_ROM (Strap)
GPIO13
A[23:0]
D[7:0]
www.national.com
Mux
Mux
D11
D10
D9
D8
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