h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 105

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h8s-2158

Manufacturer Part Number
h8s-2158
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
BCLR instruction executed
After executing BCLR
[Description on Operation]
1. When the BCLR instruction is executed, first the CPU reads P4DDR.
2. The CPU clears bit 0 of the read data to 0, changing data to H'FE.
3. The CPU writes H'FE to DDR, completing execution of BCLR.
As a result of the BCLR instruction, bit 0 in DDR is set to 0, and P40 becomes an input pin.
However, bits 7 and 6 of DDR are modified to 1, therefore P47 and P46 become output pins.
Input/output
Pin state
DDR
DR
BCLR
Since P4DDR is a write-only register, so the CPU reads H'FF. In this example P4DDR has a
value of H'3F, but the value read by the CPU is H'FF.
#0,
P47
Output
Low
level
1
1
@P4DDR
P46
Output
High
level
1
0
P45
Output
Low
level
1
0
The BCLR instruction is executed for DDR in port 4
P44
Output
Low
level
1
0
P43
Output
Low
level
1
0
Rev. 3.00 Jan 25, 2006 page 53 of 872
P42
Output
Low
level
1
0
P41
Output
Low
level
1
0
REJ09B0286-0300
Section 2 CPU
P40
Input
High
level
0
0

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