h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 549
h8s-2158
Manufacturer Part Number
h8s-2158
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2158.pdf
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17.3.8
ICSRA monitors the operating status of the IIC module.
Bit
1
0
3
2
1
0
Bit
7
6
5
4
Bit Name
AASHIT
ACKBX
CLR3
CLR2
CLR1
CLR0
Bit Name
SDAO
SCLO
SDAI
SCLI
IIC Operation Reservation Adapter Status Register A (ICSRA)
Initial Value
—
—
—
—
Initial Value
1
1
—
—
0
0
R/W
R
R
W
W
W
W
R/W
R
R
R
R
Description
Slave Address Match
0: In master mode or slave address does not match
1: Slave address matches
Acknowledge Bit Transmission Reserve
0: Reserves transmission of acknowledge bit 0
1: Reserves transmission of acknowledge bit 1
Clear 3 to 0
Writing B'0101 to these bits with an MOV instruction
initializes the internal latch circuit and state machine of
the conventional IIC module and the IIC operation
reservation adapter. The appropriate control bits of the
conventional IIC module and the IIC operation
reservation adapter must be initialized so as to
deactivate the IIC module.
When bits 7 to 4 in this register are set/cleared using a
bit manipulation instruction, the contents in BBSYX and
AASHIT are written to the CLR3 to CLR0 bits by
read/modify/write operation. However, since bit 2 is
always read as 0, clearing operation cannot be
executed.
Description
SDA Output Value
Monitors the output value from the SDA pin.
SCL Output Value
Monitors the output value from the SCL pin.
SDA Input Level
Monitors the input level to the SDA pin.
SCL Input Level
Monitors the input level to the SCL pin.
Rev. 3.00 Jan 25, 2006 page 497 of 872
Section 17 I
2
C Bus Interface (IIC)
REJ09B0286-0300
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