h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 189

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h8s-2158

Manufacturer Part Number
h8s-2158
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
6.7
A CP expansion area can be set to the CF expansion area (memory card mode) by setting both the
CPCSE bit in BCR2 to 1 and the CFE bit in BCR to 1. In memory card mode, the bus width is
fixed to 16 bits. In this mode, signal pins other than CPCS1 and CPCS2 are common to the basic
bus interface, but their signal waveforms differ. The number of access states and waveforms of the
strobe signals (CPOE and CPWE) can be controlled by the WMS21, WMS20, WC22, WC21, and
WC20 bits in WSCR2 and the OWEAC and OWENC bits in BCR2.
6.7.1
The data sizes for the CPU and other internal bus masters are byte, word, and longword. The BSC
has a data alignment function, and controls whether the upper data bus (D15 to D8) or lower data
bus (D7 to D0) is used when the CF expansion area is accessed in memory card mode according to
the accessed data size.
Figure 6.16 illustrates the data alignment control. In CF expansion area access, the upper data bus
(D15 to D8) and lower data bus (D7 to D0) are used. The amount of data that can be accessed at
one time is one byte or one word: a longword access is performed as two word accesses.
Data Size and Data Alignment
Memory Card Interface
Byte size
Byte size
Word size
Longword
size
Figure 6.16 Access Sizes and Data Alignment Control
• Even address
• Odd address
1st bus cycle
2nd bus cycle
D15
Upper data bus
Rev. 3.00 Jan 25, 2006 page 137 of 872
D8 D7
Lower data bus
Section 6 Bus Controller
: Even data
: Odd data
REJ09B0286-0300
D0

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