h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 515

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

16.10.7 SCI Operations during Mode Transitions
Transmission: Before making the transition to module stop, software standby, or sub-sleep mode,
stop all transmit operations (TE = TIE = TEIE = 0). TSR, TDR, and SSR are reset. The states of
the output pins during each mode depend on the port settings, and the pins output a high-level
signal after mode cancellation. If the transition is made during data transmission, the data being
transmitted will be undefined.
To transmit data in the same transmission mode after mode cancellation, set TE to 1, read SSR,
write to TDR, clear TDRE in this order, and then start transmission. To transmit data in a different
transmission mode, initialize the SCI first.
Figure 16.39 shows a sample flowchart for mode transition during transmission. Figures 16.40 and
16.41 show the pin states during transmission.
Before making the transition from the transmission mode using DTC transfer to module stop,
software standby, or sub-sleep mode, stop all transmit operations (TE = TIE = TEIE = 0). Setting
TE and TIE to 1 after mode cancellation generates a TXI interrupt request to start transmission
using the DTC.
Reception: Before making the transition to module stop, software standby, watch, sub-active, or
sub-sleep mode, stop reception (RE = 0). RSR, RDR, and SSR are reset. If transition is made
during data reception, the data being received will be invalid.
To receive data in the same reception mode after mode cancellation, set RE to 1, and then start
reception. To receive data in a different reception mode, initialize the SCI first.
Figure 16.42 shows a sample flowchart for mode transition during reception.
Figure 16.38 Sample Transmission using DTC in Clocked Synchronous Mode
SCK
TDRE
Serial data
Note: When external clock is supplied, t must be more than four clock cycles.
t
LSB
D0
Section 16 Serial Communication Interface (SCI, IrDA, and CRC)
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