h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 434

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 15 Watchdog Timer (WDT)
15.4.3
When TCNT overflows in watchdog timer mode, the OVF bit in TCSR is set to 1. When the
RST/NMI bit is 1 here, the internal reset signal is generated for the entire LSI. At the same time,
the low level signal is output from the RESO pin. The timing is shown in figure 15.5.
15.5
During interval timer mode operation, an overflow generates an interval timer interrupt (WOVI).
The interval timer interrupt is requested whenever the OVF flag is set to 1 in TCSR. OVF must be
cleared to 0 in the interrupt handling routine.
When the NMI interrupt request is selected in watchdog timer mode, an NMI interrupt request is
generated by an overflow.
Table 15.2 WDT Interrupt Source
Rev. 3.00 Jan 25, 2006 page 382 of 872
REJ09B0286-0300
Name
WOVI
Overflow signal
(internal signal)
OVF
RESO signal
Internal reset
signal
TCNT
RESO
RESO Signal Output Timing
Interrupt Sources
RESO
RESO
Interrupt Source
TCNT overflow
Figure 15.5 Output Timing of RESO
H'FF
Interrupt Flag
OVF
RESO
RESO Signal
RESO
132 states
H'00
518 states
DTC Activation
Not possible