h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 186

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 6 Bus Controller
6.6
In this LSI, the external address space can be designated as the burst ROM space by the BRSTRM
bit in BCR, and the burst ROM interface enabled. Consecutive burst accesses of a maximum four
or eight words can be performed only during CPU instruction fetch. 1 or 2 states can be selected
for burst ROM access.
Rev. 3.00 Jan 25, 2006 page 134 of 872
REJ09B0286-0300
CPCS1 (CPCSE = 1 and CFE = 0)
Burst ROM Interface
Figure 6.13 Example of Wait State Insertion Timing (Pin Wait Mode)
Read
Write
Notes: ↓ shown in
AS/IOS * (IOSE = 0)
AS/IOS (IOSE = 0)
WAIT/CPWAIT
* For external address space access, this signal is not output when the 256-kbyte expansion area
Address bus
is accessed with CS256E = 1 and when the CP/CF expansion area is accessed with CPCSE = 1.
Data bus
Data bus
WR
RD
clock indicates the WAIT/CPWAIT pin sampling timing.
T
1
By program wait
T
2
T
W
Write data
By WAIT/CPWAIT pin
T
W
T
W
Read data
T
3