h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 43

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Figure 21.2
Section 22 A/D Converter
Figure 22.1
Figure 22.2
Figure 22.3
Figure 22.4
Figure 22.5
Figure 22.6
Figure 22.7
Figure 22.8
Section 24 ROM
Figure 24.1
Figure 24.2
Figure 24.3
Figure 24.4
Figure 24.5
Figure 24.6
Figure 24.7
Figure 24.8
Figure 24.9
Figure 24.10 Erase/Erase-Verify Flowchart............................................................................... 736
Figure 24.11 Memory Map in Programmer Mode ..................................................................... 739
Section 25 User Debug Interface (H-UDI)
Figure 25.1
Figure 25.2
Figure 25.3
Figure 25.4
Figure 25.4
Section 26 Clock Pulse Generator
Figure 26.1
Figure 26.2
Figure 26.3
Figure 26.4
Figure 26.5
Figure 26.6
Figure 26.7
Figure 26.8
D/A Converter Operation Example ...................................................................... 694
Block Diagram of A/D Converter......................................................................... 698
External Trigger Input Timing.............................................................................. 708
A/D Conversion Accuracy Definitions ................................................................. 710
A/D Conversion Accuracy Definitions ................................................................. 710
Example of Analog Input Circuit.......................................................................... 711
Example of Analog Input Protection Circuit ........................................................ 713
Analog Input Pin Equivalent Circuit..................................................................... 713
Block Diagram of Flash Memory ......................................................................... 718
Flash Memory State Transitions ........................................................................... 719
Boot Mode ............................................................................................................ 720
ID Code Area........................................................................................................ 731
Block Diagram of H-UDI ..................................................................................... 742
TAP Controller State Transitions.......................................................................... 755
Reset Signal Circuit Without Reset Signal Interference ....................................... 758
Serial Data Input/Output (1) ................................................................................. 759
Serial Data Input/Output (2) ................................................................................. 760
Block Diagram of Clock Pulse Generator............................................................. 761
Typical Connection to Crystal Resonator ............................................................. 762
Equivalent Circuit of Crystal Resonator ............................................................... 762
Timing of External Clock Output Stabilization Delay Time ................................ 765
Subclock Input Timing ......................................................................................... 767
Note on Board Design of Oscillation Circuit Section........................................... 768
A/D Conversion Timing ....................................................................................... 707
User Program Mode (Example) ............................................................................ 721
On-Chip RAM Area in Boot Mode ...................................................................... 731
Programming/Erasing Flowchart Example in User Program Mode ..................... 732
Program/Program-Verify Flowchart ..................................................................... 734
Example of External Clock Input ......................................................................... 763
External Clock Input Timing ................................................................................ 764
Flash Memory Block Configuration .................................................................... 722
Rev. 3.00 Jan 25, 2006 page xliii of lii