h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 471

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

16.4.2
In asynchronous mode, the SCI operates on a basic clock with a frequency of 16 times the bit rate.
In reception, the SCI samples the falling edge of the start bit using the basic clock, and performs
internal synchronization. Since receive data is latched internally at the rising edge of the 8th pulse
of the basic clock, data is latched at the middle of each bit, as shown in figure 16.4. Thus the
reception margin in asynchronous mode is determined by formula (1) below.
Assuming values of F = 0 and D = 0.5 in formula (1), the reception margin is determined by the
formula below.
However, this is only the computed value, and a margin of 20% to 30% should be allowed in
system design.
Internal
basic clock
Receive data
(RxD)
Synchronization
sampling timing
Data sampling
timing
M = (0.5 –
M: Reception margin (%)
N: Ratio of bit rate to clock (N = 16)
D: Clock duty (D = 0.5 to 1.0)
L: Frame length (L = 9 to 12)
F: Absolute value of clock rate deviation
M = {0.5 – 1/(2 × 16) } × 100[%] = 46.875%
Receive Data Sampling Timing and Reception Margin in Asynchronous Mode
Figure 16.4 Receive Data Sampling Timing in Asynchronous Mode
{
0
2N
1
8 clocks
) –
Start bit
D – 0.5
Section 16 Serial Communication Interface (SCI, IrDA, and CRC)
N
16 clocks
7
– (L – 0.5) F × 100 [%]
15 0
}
Rev. 3.00 Jan 25, 2006 page 419 of 872
D0
..... Formula (1)
7
REJ09B0286-0300
15 0
D1