h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 828

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 27 Power-Down Modes
Before using this function to switch the clock, the PLL circuit must be started up to provide a
stable 24-MHz clock.
Rev. 3.00 Jan 25, 2006 page 776 of 872
REJ09B0286-0300
Bit
7
6
5
4, 3
2
1
0
Bit Name Initial Value
KWUL1
KWUL0
P6PUE
—
CKCHGE
—
PLCKS
0
0
0
All 0
0
0
0
R/W
R/W
R/W
R/W
R/(W) Reserved
R/W
R/(W) Reserved
R/W
Description
For details on bits 7 to 5, see section 9.6.4, System
Control Register 2 (SYSCR2).
The initial value should not be changed.
Clock Change Enable
Specifies the next operating mode and system clock
source ( or 24) when the SLEEP instruction is
executed while the SSBY bit is set to 1 in high-speed
mode or medium-speed mode. If the SLEEP instruction
is executed while the SSBY bit is cleared to 0, the
system clock source is not switched and operation shifts
to sleep mode.
0: Enters software standby mode or watch mode, and
1: Directly switches to the system clock source specified
The initial value should not be changed.
PLL Clock Select
Specifies
speed mode or medium-speed mode. If the LSON bit in
LPWCR and this bit are both set to 1 simultaneously, the
subclock selection by the LSON bit has higher priority
than clock selection by this bit.
0: Specifies
1: Specifies 24 as the system clock source.
switches to the system clock source specified by the
PLCKS bit.
by the PLCKS bit.
Executing the SLEEP instruction while PLCKS = 0 and
SSBY = 1 can switch the clock source to .
Executing the SLEEP instruction while LSON = 1 and
SSBY = 1 can switch the clock source to 32-kHz
Executing the SLEEP instruction while PLCKS = 1 and
SSBY = 1 can switch the clock source to 24.
SUB.
or 24 as the system clock source in high-
as the system clock source.