MC68HC908LK24 MOTOROLA [Motorola, Inc], MC68HC908LK24 Datasheet - Page 117

• Manufacturer Part Number: MC68HC908LK24
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

MC68HC908LJ24/LK24 — Rev. 2
MOTOROLA
The following conditions apply when the PLL is in automatic bandwidth
control mode:
The PLL also may operate in manual mode (AUTO = 0). Manual mode
is used by systems that do not require an indicator of the lock condition
for proper operation. Such systems typically operate well below
f
BUSMAX
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Freescale Semiconductor, Inc.
For More Information On This Product,
The ACQ bit (See
read-only indicator of the mode of the filter. (See
Acquisition and Tracking
The ACQ bit is set when the VCO frequency is within a certain
tolerance and is cleared when the VCO frequency is out of a
certain tolerance. (See
Specifications
The LOCK bit is a read-only indicator of the locked state of the
PLL.
The LOCK bit is set when the VCO frequency is within a certain
tolerance and is cleared when the VCO frequency is out of a
certain tolerance. (See
Specifications
CPU interrupts can occur if enabled (PLLIE = 1) when the PLL’s
lock condition changes, toggling the LOCK bit. (See
Control
.
Clock Generator Module (CGM)
Go to: www.freescale.com
Register.)
for more information.)
for more information.)
8.6.2 PLL Bandwidth Control
8.9 Acquisition/Lock Time
8.9 Acquisition/Lock Time
Modes.)
Clock Generator Module (CGM)
Functional Description
8.4.4
Register.) is a
8.6.1 PLL
Data Sheet
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